The nanometer thing is a way of distinguishing some processes from others. When TSMC talks that it will start manufacturing transistors at 3 nanometers, the number doesn’t really make sense. This size is not related to any actual physical characteristics, not to the length of the logic gates or any other distance from the transistor.
When companies talk about manufacturing at 3, 5 or 7 nanometers, it doesn’t mean that some are better than others. so that Nomenclature is based solely on strategic criteria and not on any specific feature, And if not tell Intel, who decided to rename their nodes from 10 nanometers to 7 nanometers, 7 to 4 nanometers and 5 to 3 nanometers.
Not all nanometers are created equal
The excuse for making these name changes is found in Transistor Density, Intel recognized that its 10-nanometer process competed in density with TSMC’s 7-nm process and therefore chose to match the nomenclature. It was characterized by the fact that the process density of 7 nanometers from Intel (250M/mm2) exceeded that of TSMC (171M/mm2) by 5 nanometers and so the “sudden advance” became 4 nanometers.
basically nanometers The length of a logic gate is used to measure, but with the improvement of various processes, nodes of different sizes began to be used. Currently, with FinFET, VTFET or GAAFET processes, the numbers used do not correspond to a specific characteristic.
This fact may confuse some users, but it is a widely known fact in the industry. ,Today these numbers are just numbers. They are like a model of a car: be it the BMW 5 Series or the Mazda 6. is like, It doesn’t matter what the number is, it’s just the naming of the next technology, the name. “Don’t confuse the name of a node with what the technology actually provides,” said Philip Wong, VP of research at TSMC.
Let’s set the advance to 3 nanometers. It’s a marketing term, yes, but appropriate because we are facing a new process, One so advanced that the industry considers it a significant advancement and deserves the name. For example, with TSMC’s 3nm FinFET, a 25-30% power reduction compared to 5nm, a 15% performance increase, and a 33% higher transistor density are promised.
but These numbers are within TSMC. In Samsung’s case it’s different, And they promise 45% less power, 23% performance and 16% less area than Samsung’s 5nm for example.
With downsizing, it’s common to wonder where the limit is. 1 nanometer is just a little over the width of five silicon atoms. But as IEEE Spectrum’s Samuel K Moore points out, you have to think that “Many parts of a 7-nanometer transistor are actually much larger than 7 nanometers, And this connection between nomenclature and physical reality has been around for almost two decades.”
Nevertheless, with the advancement of photolithographic technology, industry is already looking for new ways to describe its advanced processes. What will happen if the 1 nanometer node is rectified? There’s been talk of Angstrom going on for the past few years.
Intel CEO Pat Gelsinger argued that Start Talking About Angstroms, This way they will have more margin to define new processes. They expect to work with 1.4 nanometers (or 14 angstroms) in 2026 and 0.7 nanometers (or 7 angstroms) by 2030. These data don’t mean that the processes are going to work with the exact same distance, but they show that the nanometer nomenclature is starting to fade.